This invention pertains to a method of fabricating very high value resistors in conductive epitaxial layers grown over isolation sublayers, and the resulting structure.
During the fabrication of semiconductor devices, it is often times necessary to provide one or more resistors of predefined values over a wide range of resistance values. Heretofore, such resistors have typically been fabricated, for example, using relatively high resistivity diffused regions in the semiconductor body, or utilizing a relatively high resistivity polycrystalline silicon interconnect layer. Alternatively, active devices, such as transistors, have been configured as load devices. However, these prior art techniques generally do not provide resistors having resistance values which are closely regulated across a single device, devices fabricated across a wafer, or from lot to lot. Furthermore, diffused resistors and polycrystalline silicon resistors tend to require a relatively large amount of semiconductor surface area, thereby adding to the expense of semiconductor devices.